Digital Designer — CPU Subsystem (RTL & Verification) (Temporary Assignment) Compute System Architecture (CSA) is imecs center of excellence for hardware-software-technology co-design of future compute systems. We work in close collaboration with imecs expertise centers in
SystemC/TLM-2.0 Modeling Engineer — CPU Subsystem (Temporary Assignment) Compute System Architecture (CSA) is imecs center of excellence for hardware-software-technology co-design of future compute systems. We work in close collaboration with imecs expertise centers in applications, technology,
As a Senior FPGA Engineer, you will contribute to the development of key components of our networking system, including SmartNICs and hybrid optical switches. You will be responsible for designing and optimizing VHDL and/or Verilog implementations.