Do you want to help shape the next generation of Earth Observation platforms? At VITO, we turn satellite data into trusted information that supports decisions in areas such as climate resilience, agriculture, forestry, water management, infrastructure,
Join VeroTech as a test and prototype engineer and become part of our community where innovation and people come first. You’ll take on exciting technical challenges and develop your expertise while creating solutions that drive progress
Hey! Were Conveo.ai Conveo is a YC-backed company in an active growth period. We started this year as a team of ~20 and are on track to reach ~120 by year end. The people who join
Director Master Data and Systems Location: Bornem (Belgium) or Colmar (France) or Greenwood (US) or Rewari/ Gurugram (India) The Director, Master Data and Systems is responsible for defining and executing the global Master Data strategy for
At Johnson & Johnson,we believe health is everything. Our strength in healthcare innovation empowers us to build aworld where complex diseases are prevented, treated, and cured,where treatments are smarter and less invasive, andsolutions are personal.Through our
Catalyx is seeking a Senior Machine Vision Engineer to join our team in Belgium. Who We Are: Catalyx is a leader in industrial automation solutions, delivering innovative and efficient systems tailored to our clients needs. We
Catalyx is seeking a Junior Machine Vision Engineer to join our team in Belgium. Who We Are: Catalyx is a leader in industrial automation solutions, delivering innovative and efficient systems tailored to our clients needs. We
At Johnson & Johnson,we believe health is everything. Our strength in healthcare innovation empowers us to build aworld where complex diseases are prevented, treated, and cured,where treatments are smarter and less invasive, andsolutions are personal.Through our
As a Senior FPGA Engineer, you will contribute to the development of key components of our networking system, including SmartNICs and hybrid optical switches. You will be responsible for designing and optimizing VHDL and/or Verilog implementations. In